1）看协议，axi的interleaving通常是interconnect或master实现的。协议上举了两个抽象点的例子，大家有遇到过一些具体的例子吗？

2）AXI协议：A master interface that is capable of generating write data with only one AWID value generates all write data in the same order in which it issues the addresses. However, a master interface can interleave write data with different WID values if the slave interface has a write data interleaving depth greater than one.
这句话好像说的是，只能发同一个AWID的master，可以发不同的WID，slave也可以interleaving。
但这样的话，如何保证AWID = WID = BID，即保证是同一次传输？

3） AXI协议：For example, a slave with a write data interleaving depth of two that has four different addresses, all with different AWID values, pending can accept data for either of the first two pending addresses.
slave的interleaving depth 是2，可以支持4个不同的AWID。咋理解呢？

4）读也有interleaving吗，有具体的例子吗？在协议上好像只明确提到了write data interleaving

谢谢！